Program Management Engineer

Texas Instruments India
Bengaluru, Karnataka, India

Job Description

Texas Instruments' Embedded Processing Silicon IP Group is seeking a highly motivated and experienced Technical Program Manager (TPM) to join our IP Development team. In this role, you will drive the planning, execution, and delivery of complex IP-related programs spanning design, licensing, SoC interception, and cross-functional engineering initiatives across multiple IP domain verticals. You will serve as the connective tissue between engineering, business development, and external partners to ensure IP programs are delivered on time, within scope, and aligned with strategic objectives.

The IP team delivers silicon IP blocks that are reused across five major SoC platforms. As a TPM, you will work directly with IP Domain Leads, Chip Architects, RTL Design Engineers, and Verification Engineers to coordinate program execution across all IP domain verticals, enabling faster time-to-market and scalable product families.

IP Domain Verticals – Program Scope

Role

This role spans program management across the following IP domain verticals. The TPM is expected to understand the technical scope and interdependencies of each domain to drive effective planning, risk management, and stakeholder communication:

AI Accelerators: Program management for neural network inference engine IP development — covering compute datapath, memory hierarchy, and scalability across TOPS targets. Coordinate hardware-software co-design milestones for Edge AI workloads including transformers, SLMs, and time-series sensor inference. Track INT8/FP8/BF16/FP32 feature delivery and vector streaming engine tape-out readiness.

Compute Clusters: Drive program execution for multi-core processor cluster IP based on ARM Cortex-M/R/A or RISC-V families. Manage schedules for cluster topology definition, cache coherency implementation, inter-processor communication, and power/performance sign-off milestones.

Security: Coordinate delivery of Hardware Security Module (HSM) IP spanning low-to-mid-to-high segment products. Track crypto IP integration, secure boot architecture milestones, key management deliverables, and certification timelines (ISO 21434, IEC 62443). Manage Caliptra support and security software driver framework schedules.

Communications & Audio: Manage program timelines for high-speed and low-power communication IP blocks including USB, Ethernet, CAN-FD, LIN, and audio subsystems. Track interface specification approvals, PHY integration milestones, and protocol compliance verification schedules for industrial and automotive applications.

Networking: Drive program execution for on-chip networking fabrics, Ethernet switch subsystems, TSN (Time-Sensitive Networking), and functional safety-aware interconnects. Manage QoS, traffic shaping, and real-time determinism validation milestones for industrial automation and automotive networking programs.

Control & Sense: Coordinate delivery of analog-digital interface IP including ADCs, DACs, comparators, timers, PWM engines, and sensor interface blocks. Track mixed-signal integration milestones, calibration architecture reviews, and functional safety (IEC 61508 / ISO 26262) compliance certification schedules for motor control and industrial sensing applications.

Platform & Infrastructure: Manage program execution for foundational SoC infrastructure IP: power management, clock/reset distribution, DMA engines, memory controllers, debug/trace subsystems, and boot infrastructure. Drive IP reuse strategy milestones and platform IP standardisation across product families.

Key Responsibilities

Program Management

  • Lead end-to-end program management for IP development, licensing, and portfolio initiatives across multiple IP domain verticals, teams, and geographies.
  • Define program scope, goals, milestones, and success metrics in collaboration with IP Domain Leads, Chip Architects, and stakeholders.
  • Develop and maintain detailed program plans, schedules, risk registers, and status reports for each IP domain vertical.
  • Drive cross-functional alignment across silicon design (RTL, DV, Physical Design), software, legal, and business development teams.
  • Identify, track, and mitigate program risks and dependencies proactively across IP domain verticals.
  • Manage IP reuse program schedules to ensure timely delivery of reusable IP blocks across five major SoC platforms.
  • Coordinate tape-out readiness reviews and sign-off activities across IP domain verticals.

Stakeholder Communication

  • Serve as the primary point of contact for program status, escalations, and executive reporting across all IP domain verticals.
  • Prepare and present program updates, dashboards, and roadmaps to leadership, including domain-specific PPA and schedule health metrics.
  • Facilitate cross-team meetings across IP domain verticals, drive decisions, and ensure clear action item ownership and follow-through.
  • Communicate architectural and schedule trade-offs to senior leadership with clarity and data-driven recommendations.

Process Improvement

  • Define and implement scalable processes and tools for IP program tracking and reporting across domain verticals.
  • Drive continuous improvement in program execution efficiency and quality across the IP development lifecycle.
  • Establish best practices for IP program management, including reuse metrics, coverage tracking, and tape-out readiness criteria.
  • Champion process standardisation across IP domain verticals to enable consistent delivery quality and predictable schedules.

Qualifications

Required Qualifications

  • 5+ years of experience in technical program management, preferably in semiconductor, EDA, or IP licensing environments.
  • Strong understanding of semiconductor IP across multiple domain verticals — processor cores, AI accelerators, security HSMs, communication IPs, networking fabrics, analog-digital interface IPs, and SoC infrastructure.
  • Demonstrated experience managing complex, multi-stakeholder programs with cross-functional teams spanning RTL design, verification, physical design, and software.
  • Familiarity with SoC development lifecycle: architecture definition, RTL implementation, verification, physical design, and tape-out.
  • Understanding of IP reuse strategies and multi-platform SoC product families.
  • Excellent organisational, communication, and presentation skills.
  • Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.

Preferred Qualifications

  • Background in silicon design (RTL) or verification (DV) is a strong plus.
  • Experience with IP licensing or open-source IP ecosystems (e.g., RISC-V, Caliptra).
  • Experience with ARM Cortex-M/R/A, RISC-V, or other processor IP ecosystems.
  • Familiarity with functional safety standards (IEC 61508, ISO 26262, ISO 21434, IEC 62443) and their impact on IP development schedules and certification milestones.
  • Knowledge of AI/ML accelerator IP development and Edge AI workload requirements.
  • Experience managing communication or networking IP programs (USB, Ethernet, CAN-FD, TSN).
  • Familiarity with PPA (Power, Performance, Area) trade-off frameworks and their program management implications.
  • Proficiency in program management tools and dashboards (Jira, Confluence, MS Project, or equivalent).

About Us

Why TI?

  • The future starts here. As a TIer, you'll play a critical role in defining the next era of semiconductor technology and help create the innovations that shape the world around us.
  • Surround yourself with a team of innovators who value your unique perspective and will challenge you to bring your best self to work every day. We believe that fostering a culture of collaboration fuels both personal growth and technological breakthroughs. Explore our company culture .
  • At TI, your success goes beyond your work. Take advantage of comprehensive benefits designed to support your total well-being at work and in life, from competitive compensation to extensive health coverage and wellness programs. Learn more about our benefits offerings .

About Texas Instruments

Texas Instruments Incorporated (Nasdaq: TXN) is a global semiconductor company that designs, manufactures and sells analog and embedded processing chips for markets such as industrial, automotive, data center, personal electronics and communications equipment. At our core, we have a passion to create a better world by making electronics more affordable through semiconductors. This passion is alive today as each generation of innovation builds upon the last to make our technology more reliable, more affordable and lower power, making it possible for semiconductors to go into electronics everywhere. Learn more at TI.com .

Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment.

If you are interested in this position, please apply to this requisition.

About The Team

TI does not make recruiting or hiring decisions based on citizenship, immigration status or national origin. However, if TI determines that information access or export control restrictions based upon applicable laws and regulations would prohibit you from working in this position without first obtaining an export license, TI expressly reserves the right not to seek such a license for you and either offer you a different position that does not require an export license or decline to move forward with your employment.

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The job description asks for technical program management, semiconductor, EDA, IP licensing, semiconductor IP, processor cores, AI accelerators and security HSMs. Make sure your resume shows the ones you have, in the words the job uses: applicant tracking systems look for them.

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This is based in Bengaluru, Karnataka.

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